Friday, August 27, 2010

VHDL 360, Create Your First Model for a Simple Logic Circuit

  • Entity
  • Exercise 1: Write the Entity of a 1-bit Full Adder
  • Architecture
  • Internal Signals
  • Expressions & Operators
  • Exercise 2: Write the Architecture of a 1-bit Full Adder
  • With-Select
  • When-Else
  • Exercise 3: Write the Entity and Architecture of 2x4 Decoder and 4x2 Encoder using With-Select and When-Else

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